1. Technical Field
The current invention relates to low voltage differential signal (LVDS) drivers. In particular, this invention relates to a LVDS circuit and method that generate the output signals using a network of matched resistors that are configured based on a switching sequencer.
2. Background Art
Current trends in computer hardware are toward higher frequency applications. As a result, bandwidth interfaces in excess of one gigabit per second are now becoming more common. However, the speed in which board components in hardware such as routers, ethernet communications, and cellular telephone base stations interface is limited by physical constraints including board space, chip pin quantities, etc. As a result, currently available bandwidth capabilities exceed the limitations of current printed circuit board and chip packaging technologies.
LVDS drivers provide one solution to this problem. An LVDS driver represents a digital value as a differential voltage signal. The differential voltage signal is represented by the voltage difference between two output lines. The signals on the two output lines always complement each other with a higher voltage on a first line representing a digital value of one, and a higher voltage on the second line representing a digital value of zero.
The Institute for Electrical and Electronic Engineers, Inc. (IEEE) Standard 1596 addresses LVDS performance requirements. Under the standard, an LVDS driver transmits a low voltage differential signal to a resistively terminated differential receiver. The differential receiver resolves the true signal by amplifying the voltage difference across the termination resistor. The amplified signal is clamped to ground or to the power supply voltage (Vdd), and is available for use by the internal logic elements on the receiver.
Current implementations of the LVDS circuit typically include one or more current sources and sinks. The current source is used to provide the ‘Hi’ signal, and the current sink provides the ‘Lo’ signal. The ‘Hi’ and ‘Lo’ signals are matched using a current mirror. However, implementation of the current mirror includes several limitations that make compliance with IEEE Std 1596 difficult. For example, the standard specifies that an impedance at each output be between 40 Ohms and 140 Ohms. Because an ideal current source represents infinite impedance, it is difficult to construct current source and sink elements that meet this standard. Similarly, it is difficult to construct a circuit having an impedance difference between both output signals within the ten percent error specified by IEEE.
Additionally, IEEE Std 1596 specifies that the output offset voltage (Vos) must be regulated between 1.125 V and 1.275 V. Current LVDS circuit implementations frequently use a feedback circuit in conjunction with a voltage reference to satisfy this IEEE specification. In this case, a driver's output voltages are sensed and compared with a reference voltage. The output voltages are then modified as required to match the reference value. However, the addition of a feedback stage requires considerable analysis in order to insure stability and to minimize drift in the output voltages. Further, the use of a feedback amplifier also requires considerable time (i.e., more than 10 nanoseconds) for the circuit to recover from being tristated (disabled).
As a result, there exists a need for a LVDS circuit and method that eliminate the complexities and deficiencies of the current techniques. In particular, there exists a need for an LVDS circuit in which a desired impedance value and balance can be easily obtained. Further, there exists a need for a LVDS circuit and method that allow for quicker recovery from tristate. Still further, there exists a need for a LVDS circuit and method that solve the above needs while being compatible with the relevant specifications of IEEE Std 1596.